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US Patent 10854578 Diffused bitline replacement in stacked wafer memory

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
March 29, 2019
Date of Patent
December 1, 2020
Patent Application Number
16369631
Patent Citations Received
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US Patent 12136605 Layer structures for making direct metal-to-metal bonds at low temperatures in microelectronics and method for forming the same
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US Patent 12113056 Stacked dies and methods for forming bonded structures
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US Patent 12125784 Interconnect structures
0
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US Patent 12132020 Low temperature bonded structures
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US Patent 11621246 Diffused bitline replacement in stacked wafer memory
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US Patent 11626363 Bonded structures with integrated passive component
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US Patent 11631586 Heterogeneous annealing method
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US Patent 11631647 Integrated device packages with integrated device die and dummy element
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US Patent 11652083 Processed stacked dies
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US Patent 11658173 Stacked dies and methods for forming bonded structures
0
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10854578
Patent Primary Examiner
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Phuc T. Dang

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