Is a
Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Sumeet Aggarwal0
Kiranrao Kuduregundi0
Date of Patent
January 12, 2021
Patent Application Number
16398610
Date Filed
April 30, 2019
Patent Primary Examiner
Patent abstract
An integrated circuit, such as a flip chip, may be configured to increase the I/O cells by stacking the I/O cells in two or more rows with external high voltage circuits on opposite sides of a respective cell to reduce the distance between the rows. In addition, the integrated circuit may include a guard ring around the I/O cells to reduce signal noise interference generated by the external high voltage circuits in the I/O cells.
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