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US Patent 10903846 Power efficient successive approximation analog to digital converter
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Patent
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Date Filed
May 5, 2020
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Date of Patent
January 26, 2021
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Patent Application Number
16867358
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Patent Citations Received
US Patent 12113542 Calibration detector with two offset compensation loops
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US Patent 11043958 Time-interleaved noise-shaping successive-approximation analog-to-digital converter
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US Patent 11444634 Time-interleaved noise-shaping successive-approximation analog-to-digital converter
US Patent 11863198 Successive approximation register analog to digital converter with reduced data path latency
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US Patent 11929756 System and method for offset calibration in a successive approximation analog to digital converter
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US Patent 11476868 Dual loop SAR ADC with process driven architecture
Patent Inventor Names
Yong Liu
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Delong Cui
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Jun Cao
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10903846
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Patent Primary Examiner
Joseph J Lauture
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