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US Patent 10963609 Method for analyzing electromigration (EM) in integrated circuit

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Patent Citations Received
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US Patent 12008302 Integrated circuit with thicker metal lines on lower metallization layer
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Patent abstract

Methods for analyzing electromigration (EM) in an integrated circuit (IC) are provided. The layout of the IC is obtained. A metal segment is selected from the layout according to the current simulation result of the IC. It is determined whether to relax the EM rule on the metal segment according to the number of vias over the metal segment in the layout. The vias are in contact with the metal segment.

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US Patent 11657199 Method for analyzing electromigration (EM) in integrated circuit
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Official Website
https://pdfpiw.uspto.gov/.piw?Docid=1096360900
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https://pdfpiw.uspto.gov/.piw?Docid=10963609
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 US Patent 10963609 Method for analyzing electromigration (EM) in integrated circuit

Infobox
Is a
Patent
Patent
Patent jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent number
10963609
Date of patent
March 30, 2021
Patent application number
16734487
Date Filed
January 6, 2020
Patent citations
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US Patent 10574198 Integrated circuit devices with selectively arranged through substrate vias and method of manufacture thereof
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US Patent 10651201 Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped and/or a via disposed for mitigating electromigration
Patent primary examiner
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Naum Levin

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