US Patent 10971452 Semiconductor package including electromagnetic interference shielding layer

A semiconductor package includes a base substrate and first to Nth sub packages sequentially stacked over the base substrate with each sub package including a semiconductor die and a bridge die disposed on at least one side of the semiconductor die and electrically connected to the semiconductor die, where N is a natural number equal to or more than two (2). The semiconductor package also includes a molding layer formed on the base substrate and exposing an Nth conductive post included in the Nth sub package while covering the first to Nth sub packages. The semiconductor package further includes a shielding layer formed on the molding layer and electrically connected to the Nth conductive post.