Patent 10985764 was granted and assigned to Xilinx on April, 2021 by the United States Patent and Trademark Office.
An example method of clock and data recovery (CDR) includes adding a pre-defined offset to an output of a phase detector (PD) of a CDR circuit, and loading an accumulator of a frequency loop of the CDR circuit with a pre-defined load value. The method further includes detecting the phase of an incoming signal using a PD, and determining that the CDR has locked onto a real lock point. In some examples, the method further includes determining that the CDR has locked on a real lock point, and, in response to the determination, modifying the pre-defined offset to equal zero.