US Patent 11069613 Integrated circuit device and method of manufacturing the same

An integrated circuit device includes a first insulation layer on a substrate, a lower wiring structure in the first insulation layer and including a metal layer and a conductive barrier layer, such that the metal layer is on the conductive barrier layer, an etch stop layer overlapping an upper surface of the first insulation layer and an upper surface of the conductive barrier layer and having a first thickness, a capping layer overlapping a portion of the upper surface of the metal layer and having a second thickness which is less than the first thickness, a second insulation layer overlapping the etch stop layer and the capping layer, and an upper wiring structure connected to another portion of the upper surface of the metal layer not overlapped by the capping layer in the second insulation layer.