Patent 11233140 was granted and assigned to Taiwan Semiconductor Manufacturing Company on January, 2022 by the United States Patent and Trademark Office.
In a method of manufacturing a semiconductor device including a field effect transistor (FET), a sacrificial region is formed in a substrate, and a trench is formed in the substrate. A part of the sacrificial region is exposed in the trench. A space is formed by at least partially etching the sacrificial region, an isolation insulating layer is formed in the trench and the space, and a gate structure and a source/drain region are formed. An air spacer is formed in the space under the source/drain region.