US Patent 11276677 Concurrent optimization of 3D-IC with asymmetrical routing layers
Patent 11276677 was granted and assigned to Cadence Design Systems on March, 2022 by the United States Patent and Trademark Office.
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Patent Number
112766770
Date of Patent
March 15, 2022
0Patent Application Number
167892960
Date Filed
February 12, 2020
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Patent Number
112766770
Date of Patent
March 15, 2022
0Patent Application Number
167892960
Date Filed
February 12, 2020
0Official Website
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Disclosed is an approach to implement multi-die concurrent placement, routing, and/or optimization across multiple dies. This permits the multiple dies to be modeled as a single 3D space. Instead of being limited to a 2D plane, a cell can be placed to the area of any of the dies without splitting the netlist beforehand.
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US Patent 11276677 Concurrent optimization of 3D-IC with asymmetrical routing layers
Infobox
Is a
Patent applicant
Current assignee
Patent jurisdiction
Patent number
11276677
Date of patent
March 15, 2022
Patent application number
16789296
Date Filed
February 12, 2020
Patent primary examiner
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