US Patent 11276677 Concurrent optimization of 3D-IC with asymmetrical routing layers
Patent 11276677 was granted and assigned to Cadence Design Systems on March, 2022 by the United States Patent and Trademark Office.
Is a
Current Assignee
Date Filed
February 12, 2020
Date of Patent
March 15, 2022
Patent Applicant
Patent Application Number
16789296
Patent Citations Received
Patent Jurisdiction
Patent Number
Patent Primary Examiner
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