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US Patent 11334705 Electrical circuit design using cells with metal lines
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Patent
Current Assignee
Synopsys
Date Filed
December 7, 2020
Date of Patent
May 17, 2022
Patent Applicant
Synopsys
Patent Application Number
17114233
Patent Citations
US Patent 10559558 Pin modification for standard cells
US Patent 11139241 Integrated circuit device with crenellated metal trace layout
US Patent 11043428 Method for designing layout of semiconductor device and method for manufacturing semiconductor device using the same
US Patent 10002881 Programmable integrated circuit standard cell
US Patent 10019332 Non-volatile memory with program failure recovery
US Patent 10147684 Integrated circuit devices
US Patent 10339249 Using color pattern assigned to shapes for custom layout of integrated circuit (IC) designs
US Patent 10460069 Functional reactive PCells
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11334705
Patent Primary Examiner
Naum Levin
CPC Code
G06F 30/3323
G06F 30/398
H01L 27/11803
H01L 27/0207
G06F 30/367
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