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US Patent 11335804 Scalable vertical transistor bottom source-drain epitaxy
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Patent
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Date Filed
January 2, 2020
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Date of Patent
May 17, 2022
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Patent Application Number
16732642
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Patent Citations
US Patent 10103247 Vertical transistor having buried contact, and contacts using work function metals and silicides
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US Patent 10319836 Effective junction formation in vertical transistor structures by engineered bottom source/drain epitaxy
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US Patent 10096692 Vertical field effect transistor with reduced parasitic capacitance
US Patent 10263122 Methods, apparatus, and manufacturing system for self-aligned patterning of contacts in a vertical field effect transistor
Patent Inventor Names
Ruilong Xie
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Alexander Reznicek
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Chun-Chen Yeh
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11335804
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Patent Primary Examiner
Errol V Fernandes
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CPC Code
H01L 21/02532
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H01L 21/3065
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H01L 29/7827
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