US Patent 11348648 Semiconductor memory device

According to an embodiment, a semiconductor memory device includes a memory cell array and a control circuit. The control circuit is configured to suspend a first operation on the memory cell array while the first operation is being performed, to start a first read operation on the memory cell array, and to resume the suspended first operation at least after the first read operation has been started. Upon receipt of a first command, a setting as to whether or not to resume the suspended first operation in response to receipt of a second command is switched. The second command is different from the first command.