US Patent 11604732 Memory performance during program suspend protocol

Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device perform operations comprising receiving a sequence of read commands from a memory sub-system controller; retrieving first data by executing a first read command of the set of read commands; storing the first data in a first portion of a cache of the memory device; responsive to determining that the memory device is in a suspended state, determining whether a first address range specified by the first read command overlaps with a second address range specified by a second read command of the set of read commands; responsive to determining that the first address range does not overlap with the second address range, retrieving second data by executing the second read command and storing the second data in a second portion of the cache; transferring the first and second data to the controller.