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US Patent 11444057 Package structures and methods of forming
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Patent
Current Assignee
Taiwan Semiconductor Manufacturing Company
Date Filed
June 1, 2020
Date of Patent
September 13, 2022
Patent Application Number
16889487
Patent Citations
US Patent 10490540 Multi-stack package-on-package structures
US Patent 10224217 Wafer level fan out package and method of fabricating wafer level fan out package
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11444057
Patent Primary Examiner
David A Zarneke
CPC Code
H01L 25/071
H01L 25/0652
H01L 25/112
H01L 25/043
H01L 25/0657
H01L 25/074
H01L 25/0756
H01L 25/117
H01L 25/0655
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