US Patent 11462614 Semiconductor devices and methods of manufacturing

Semiconductor devices and their manufacturing methods are disclosed herein, and more particularly to semiconductor devices including a transistor having gate all around (GAA) transistor structures and manufacturing methods thereof. Different thickness in an epi-growth scheme is adopted to create different sheet thicknesses within the same device channel regions for use in manufacturing vertically stacked nanostructure (e.g., nanosheet, nanowire, or the like) GAA devices. A vertically stacked nanostructure GAA device may be formed with a topmost channel region that is thinner than a bottommost channel region. Furthermore, the topmost channel region of the GAA device may be formed with lightly doped drain regions with a highest concentration and/or a greater degree of lateral diffusion of implanted dopants as compared to the bottommost channel region.