Patent attributes
A single stage transmitter that operates at high speed is configured to operate as a driver in write mode and a termination in read mode. The driver configuration includes two circuits. The first circuit includes a PMOS cross-coupled device and a PMOS cascode circuit. The second circuit includes a NMOS cross-coupled device and a NMOS cascode circuit. The PMOS cross-coupled device and the NMOS cross-coupled device is connected in series by alternating current (AC) coupling capacitors. The termination configuration includes a third circuit including MOSFET transmission gates and an inverter controlled by a termination mode enable signal. In write mode, the third circuit of the single stage transmitter is turned off and the first and second circuits are operational. In read mode, the first and second circuits of the single stage transmitter are inactive and the third circuit is operational.
