Patent attributes
Full-duplex communications over a single-wire bus is described in the present disclosure. In embodiments disclosed herein, a master circuit and a slave circuit(s) are able to communicate forward (master to slave) bus telegrams and reverse (slave to master) bus telegrams concurrently over a single-wire bus consisting of one wire. Specifically, the master circuit is configured to modulate the forward bus telegrams based on voltage pulse-width modulation (PWM), while the slave circuit(s) is configured to modulate the reverse bus telegrams based on current variations. In addition, the slave circuit(s) is further configured to harvest power from the master circuit concurrent to receiving the forward bus telegrams and sending the reverse bus telegrams. By supporting full-duplex communications over the single-wire bus, it is possible to improve efficiency, cost, and power consumption in an electronic device wherein the single-wire bus is deployed.
