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US Patent 11538763 Chip package
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Patent
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Date Filed
July 11, 2021
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Date of Patent
December 27, 2022
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Patent Application Number
17372459
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Patent Citations
US Patent 10490521 Advanced structure for info wafer warpage reduction
US Patent 10192796 Semiconductor device and method of forming dual-sided interconnect structures in FO-WLCSP
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US Patent 10043768 Semiconductor device and method of manufacture thereof
Patent Citations Received
US Patent 12062618 Chip package
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US Patent 11894306 Chip package
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Patent Inventor Names
Ping-Jung Yang
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11538763
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Patent Primary Examiner
Xiaoming Liu
0
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