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US Patent 11663137 Memory array page table walk
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Patent
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Current Assignee
Micron Technology
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Date Filed
November 19, 2021
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Date of Patent
May 30, 2023
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Patent Applicant
Micron Technology
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Patent Application Number
17531551
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Patent Citations
US Patent 7406494 Method of generating a cycle-efficient bit-reverse index array for a wireless communication system
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US Patent 7447720 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
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US Patent 7454451 Method for finding local extrema of a set of values for a parallel processing element
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US Patent 7535769 Time-dependent compensation currents in non-volatile memory read operations
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US Patent 7574466 Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
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US Patent 7663928 Sense amplifier circuit having current mirror architecture
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US Patent 7791962 Semiconductor device and semiconductor signal processing apparatus
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US Patent 7796453 Semiconductor device
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US Patent 7805587 Memory addressing controlled by PTE fields
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US Patent 7808854 Systems and methods for data transfers between memory cells
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•••
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11663137
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Patent Primary Examiner
Daniel C. Chappell
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CPC Code
G06F 3/00
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