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US Patent 11705429 Redundant through-silicon vias
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Patent
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Current Assignee
Micron Technology
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Date Filed
September 4, 2020
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Date of Patent
July 18, 2023
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Patent Applicant
Micron Technology
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Patent Application Number
17013225
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Patent Citations
US Patent 10468386 TSV redundancy and TSV test select scheme
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US Patent 10454484 Electronic device with a timing adjustment mechanism
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US Patent 9407273 Digital delay-locked loop (DLL) training
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US Patent 9455726 XOR (exclusive or) based triangular mixing for digital phase control
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US Patent 9614533 Digital phase control with programmable tracking slope
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US Patent 10270453 Coarse delay lock estimation for digital DLL circuits
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US Patent 10381055 Flexible DLL (delay locked loop) calibration
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11705429
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Patent Primary Examiner
Uyen Smet
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CPC Code
H01L 2225/06544
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G11C 13/004
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G11C 13/0069
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G11C 29/702
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H01L 25/0657
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G11C 13/0028
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G11C 13/003
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G11C 2013/0045
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G11C 13/0026
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H01L 27/2481
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