Patent attributes
A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.