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US Patent 11710780 Semiconductor device fabrication method

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
February 1, 2021
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Date of Patent
July 25, 2023
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Patent Application Number
17164253
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Patent Citations
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US Patent 7563665 Semiconductor device and method for manufacturing semiconductor device
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US Patent 8093659 Three-dimensional stacked-fin-MOS device with multiple gate regions
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US Patent 8299565 Semiconductor nanowires having mobility-optimized orientations
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US Patent 8779495 Stacked SONOS memory
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US Patent 9111784 Integrate circuit with nanowires
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US Patent 9355920 Methods of forming semiconductor devices and FinFET devices, and FinFET devices
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US Patent 9425278 Segregated FinFET structure and manufacturing method
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US Patent 9570609 Crystalline multiple-nanosheet strained channel FETs and methods of fabricating the same
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US Patent 9601576 Nanowire FET with tensile channel stressor
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US Patent 9647098 Thermionically-overdriven tunnel FETs and methods of fabricating the same
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•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11710780
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Patent Primary Examiner
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David A Zarneke
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CPC Code
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H01L 21/823821
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H01L 21/845
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H01L 27/0886
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H01L 27/0924
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H01L 29/41791
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H01L 29/66795
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H01L 29/785
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H01L 21/823431
0

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