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Patent Applicant
0
Current Assignee
0
Patent Jurisdiction
Patent Number
Date of Patent
July 25, 2023
0Patent Application Number
177140810
Date Filed
April 5, 2022
0Patent Citations
...
Patent Primary Examiner
CPC Code
In an embodiment, an apparatus includes an integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal. The IC chips is configured to a reference time signal based on the timing signal and the reference clock signal. The IC chip includes a phase lock loop (PLL). The PLL is synchronized based on the reference time signal.
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