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US Patent 11758736 Ferroelectric random access memory devices and methods
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Patent
Date Filed
February 17, 2022
Date of Patent
September 12, 2023
Patent Application Number
17674422
Patent Citations
US Patent 9224833 Method of forming a vertical device
US Patent 9251888 SRAM cells with vertical gate-all-round MOSFETs
US Patent 9362355 Nanosheet MOSFET with full-height air-gap spacer
US Patent 9871140 Dual strained nanosheet CMOS and methods for fabricating
US Patent 10128327 DRAM interconnect structure having ferroelectric capacitors exhibiting negative capacitance
US Patent 10170520 Negative-capacitance steep-switch field effect transistor with integrated bi-stable resistive system
US Patent 10374086 3D transistor having a gate stack including a ferroelectric film
US Patent 10559656 Wrap-all-around contact for nanosheet-FET and method of forming same
US Patent 10396145 Memory cells comprising ferroelectric material and including current leakage paths having different total resistances
US Patent 10720431 Methods of fabricating semiconductor devices having gate-all-around structure with oxygen blocking layers
•••
Patent Inventor Names
Chi On Chui
Bo-Feng Young
Sai-Hooi Yeong
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11758736
Patent Primary Examiner
Mohammad M Hoque
CPC Code
H01L 29/1079
H01L 29/66439
H01L 29/775
H01L 29/78696
H01L 29/0673
H01L 29/66795
B82Y 10/00
G11C 11/221
G11C 11/225
H01L 29/0669
•••
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