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US Patent 11764075 Package assembly for plating with selective molding

Overview Structured Data Issues Contributors Activity

Is a

Date Filed

June 16, 2022

Date of Patent

September 19, 2023

Patent Application Number

17842414

Patent Citations

US Patent 8159826 Surface treatments for contact pads used in semiconductor chip packagages and methods of providing such surface treatments

US Patent 9461009 Method and apparatus for assembling a semiconductor package

US Patent 9466585 Reducing defects in wafer level chip scale package (WLCSP) devices

US Patent 9472528 Integrated electronic package and method of fabrication

US Patent 9538659 Solder wettable flanges and devices and systems incorporating solder wettable flanges

US Patent 9606079 Integrated circuit with sensors and manufacturing method

US Patent 9607918 Fan-out wafer level packages containing embedded ground plane interconnect structures and methods for the fabrication thereof

US Patent 9640463 Built-up lead frame package and method of making thereof

US Patent 9673150 EMI/RFI shielding for semiconductor device packages

US Patent 9741692 Methods to form high density through-mold interconnections

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Patent Inventor Names

Huiying Ding

Heinrich Karrer

Thomas Schmidt

Junfeng Liu

Longnan Jin

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

Patent Primary Examiner

Marc Anthony Armand

CPC Code

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