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US Patent 11776631 Integrated circuit device
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Patent
Date Filed
June 24, 2021
Date of Patent
October 3, 2023
Patent Application Number
17357494
Patent Citations
US Patent 9984760 Suppressing disturb of select gate transistors during erase in memory
US Patent 9916901 Memory device including multiple gate-induced drain leakage current generator circuits
US Patent 9953710 Memory devices with a connecting region having a band gap lower than a band gap of a body region
US Patent 8427881 Semiconductor memory device and programming method thereof
US Patent 8537615 Nonvolatile semiconductor memory device
US Patent 8923072 Non-volatile memory device and method of fabricating the same
US Patent 9236126 Simplified nonvolatile memory cell string and NAND flash memory array using the same
US Patent 9355913 3D semiconductor devices and methods of fabricating same
US Patent 9378831 Nonvolatile memory devices, operating methods thereof and memory systems including the same
US Patent 9613980 Semiconductor memory device
•••
Patent Inventor Names
Jae-Duk Lee
Jang-Gn Yun
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11776631
Patent Primary Examiner
Ajay Ojha
CPC Code
G11C 16/0483
H01L 27/11573
H01L 27/11582
G11C 16/14
H01L 23/528
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