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US Patent 11777504 Non-linear polar material based latch
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Patent
Date Filed
November 29, 2022
Date of Patent
October 3, 2023
Patent Application Number
18059938
Patent Citations
US Patent 7837110 Magnetic stripe reader having digital peak detector
US Patent 7897454 Metal-insulator-metal capacitor and fabrication method thereof
US Patent 8247855 Enhanced local interconnects employing ferroelectric electrodes
US Patent 8332722 Method and architecture for performing scrubbing of an FPGA's configuration memory
US Patent 8957716 Multiple threshold voltage standard cells
US Patent 9276040 Majority- and minority-gate logic schemes based on magneto-electric devices
US Patent 9324405 CMOS analog memories utilizing ferroelectric capacitors
US Patent 9559671 Devices and methods with capacitive storage for latch redundancy
US Patent 9697882 Analog ferroelectric memory with improved temperature range
US Patent 9858979 Reprogrammable non-volatile ferroelectric latch for use with a memory controller
•••
Patent Inventor Names
Amrita Mathuriya
Sasikanth Manipatruni
Rafael Rios
Ikenna Odinaka
Rajeev Kumar Dokania
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11777504
Patent Primary Examiner
Kurtis R Bahr
CPC Code
H03K 19/185
H01L 28/55
H03K 19/21
G11C 7/106
G11C 7/1087
H03K 19/23
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