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US Patent 11778826 Vertical memory devices
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Patent
Date Filed
March 28, 2022
Date of Patent
October 3, 2023
Patent Application Number
17705513
Patent Citations
US Patent 9337207 Semiconductor devices including word line interconnecting structures
US Patent 9991271 Integrated circuit device including vertical memory device and method of manufacturing the same
US Patent 10056333 Stacked multilayer structure and manufacturing method thereof
US Patent 10262936 Semiconductor device and manufacturing method thereof
US Patent 10192928 Semiconductor device and method of manufacturing the same
US Patent 10283566 Three-dimensional memory device with through-stack contact via structures and method of making thereof
US Patent 8994099 Multi-level contact to a 3D memory array and method of making
US Patent 9214569 Memory device
Patent Inventor Names
Kohji Kanamori
Shinhwan Kang
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11778826
Patent Primary Examiner
Galina G Yushina
CPC Code
H01L 21/02667
H01L 21/31111
H01L 21/31116
H01L 21/31144
H01L 23/5226
H01L 23/528
H01L 29/40117
H01L 21/76805
H01L 21/76831
H01L 21/76816
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