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US Patent 11791242 Semiconductor device
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Patent
Date Filed
July 9, 2021
Date of Patent
October 17, 2023
Patent Application Number
17371602
Patent Citations
US Patent 9679850 Method of fabricating semiconductor structure
US Patent 9865549 Semiconductor device, manufacturing method thereof, and electronic apparatus
US Patent 9997393 Methods for fabricating integrated circuits including substrate contacts
US Patent 10535631 3D Chip-on-wager-on-substrate structure with via last process
US Patent 10269863 Methods and apparatus for via last through-vias
US Patent 10600759 Power and ground design for through-silicon via structure
US Patent 9536777 Interconnect apparatus and method
US Patent 9666520 3D stacked-chip package
Patent Inventor Names
Kwangwuk Park
Inyoung Lee
Sungdong Cho
Hyoungyol Mun
Youngmin Lee
Seokhwan Jeong
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11791242
Patent Primary Examiner
Herve-Louis Y Assouman
CPC Code
H01L 2225/06586
H01L 24/05
H01L 24/13
H01L 2225/06517
H01L 2225/06541
H01L 2225/06562
H01L 23/49827
H01L 23/485
H01L 23/49838
H01L 24/06
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