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US Patent 11804528 Semiconductor device
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Patent
Date Filed
May 20, 2021
Date of Patent
October 31, 2023
Patent Application Number
17325466
Patent Citations
US Patent 8648472 Semiconductor device
US Patent 8669176 BEOL integration scheme for copper CMP to prevent dendrite formation
US Patent 9935051 Multi-level metallization interconnect structure
US Patent 8952535 Semiconductor transistor device with barrier interconnects
US Patent 10083863 Contact structure for semiconductor device
US Patent 8125085 Semiconductor device having wiring with oxide layer of impurity from the wiring
US Patent 8232196 Interconnect structure having a via with a via gouging feature and dielectric liner sidewalls for BEOL integration
Patent Inventor Names
Da Un Jeon
Sang Young Kim
Byung Chan Ryu
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11804528
Patent Primary Examiner
Farun Lu
CPC Code
H01L 23/5283
H01L 23/5226
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