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US Patent 11837680 Substrate structuring methods

Patent 11837680 was granted and assigned to Applied Materials on December, 2023 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
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Patent attributes

Patent Applicant
Applied Materials
Applied Materials
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Current Assignee
Applied Materials
Applied Materials
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
118376800
Patent Inventor Names
Han-Wen Chen0
Giback Park0
Steven Verhaverbeke0
Date of Patent
December 5, 2023
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Patent Application Number
177474080
Date Filed
May 18, 2022
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Patent Citations
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US Patent 7129117 Method of embedding semiconductor chip in support plate and embedded structure thereof
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US Patent 7166914 Semiconductor package with heat sink
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US Patent 7170152 Wafer level semiconductor package with build-up layer and method for fabricating the same
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US Patent 7192807 Wafer level package and fabrication method
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US Patent 7211899 Circuit substrate and method for fabricating the same
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US Patent 7271012 Failure analysis methods and systems
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US Patent 7276446 Planarizing solutions, planarizing machines and methods for mechanical or chemical-mechanical planarization of microelectronic-device substrate assemblies
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US Patent 7312405 Module structure having embedded chips
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...
Patent Primary Examiner
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Earl N Taylor
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CPC Code
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H01L 21/30621
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H01L 21/3086
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H01L 21/486
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H01L 21/6835
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H01L 21/76898
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H01L 23/49827
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H01L 31/1892
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H01L 2221/68345
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Patent abstract

The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.

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