US Patent 11844216 Three-dimensional memory devices and fabricating methods thereof

A method for forming a gate structure of a 3D memory device is provided. The method comprises: forming an alternating layer stack on a substrate; forming a plurality of channel holes in the alternating layer stack, each penetrating vertically through the alternating layer stack; forming a functional layer including a storage layer on a sidewall of each channel hole, wherein the storage layer has an uneven surface; forming a channel layer to cover the functional layer in each channel hole; and forming a filling structure to cover the channel layer and fill each channel hole.