Is a
Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Tero Tapio Ranta0
Matt Allison0
Simon Edward Willard0
Shashi Ketan Samal0
Date of Patent
January 9, 2024
0Patent Application Number
178842520
Date Filed
August 9, 2022
0Patent Citations
...
Patent Primary Examiner
Patent abstract
A positive-logic FET switch stack that does not require a negative bias voltage, exhibits high isolation and low insertion/mismatch loss, and may withstand high RF voltages. Embodiments include a FET stack comprising series-coupled positive-logic FETs (i.e., FETs not requiring a negative voltage supply to turn OFF), series-coupled on at least one end by an “end-cap” FET of a type that turns OFF when its V
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