Patent attributes
Aspects of the disclosure provide a method to manufacture a semiconductor device. The method includes filling a sacrificial layer in a first via of a first stack. An initial top CD is larger than an initial bottom CD of the first via. A second stack is formed along a vertical direction over the first stack. A third stack is formed along the vertical direction over the second stack. The first stack, the second stack, and the third stack include alternating insulating layers and gate layers. The insulating layers of the second stack etch at a faster rate than the insulating layers of the third stack and the gate layers of the second stack etch at a faster rate than the gate layers of the third stack. A first via, a second via, and a third via are formed in the first stack, the second stack, and the third stack, respectively.
