US Patent 11967395 Buffers and multiplexers

A buffer circuit and a multiplexer using the buffer are provided. The buffer may selectively operate at a first mode or a second mode. The buffer includes a first signal input terminal, a first signal output terminal, and a path circuit coupled between the first signal input terminal and the first signal output terminal. The path circuit has a voltage source terminal. In response to the buffer operating at the first mode, a first signal transmission path is formed in the path circuit and between the first signal input terminal and the first signal output terminal. The first signal transmission path is disconnected from the voltage source terminal.