US Patent 11967558 Wafer stacking structure and manufacturing method thereof

A wafer stack structure includes an interlayer, a first wafer, and a second wafer. The interlayer has a first surface and a second surface opposite to the first surface. The intermediate layer includes a dielectric material layer and a redistribution layer embedded in the dielectric material layer. The first wafer is disposed on the first surface of the interlayer. The second wafer is disposed on the second surface of the interlayer. The second wafer is electrically connected to the first wafer through the redistribution layer of the interlayer.