US Patent 12010930 Wrap-around projection liner for AI device

A semiconductor structure includes a plurality of conductive lines formed within a dielectric, wherein each of the plurality of conductive lines electrically communicates with a respective contact, a metal layer disposed over each of the plurality of conductive lines, a phase change memory (PCM) element disposed over the metal layer of each of the plurality of conductive lines, and a projection liner encapsulating the PCM element. Spacers directly contact sidewalls of the projection liner and the PCM element includes a GeSbTe (germanium-antimony-tellurium or GST) layer.