US Patent 12022654 Memory device and method of manufacturing the same

Provided is a memory device including a substrate, a stack structure, a polysilicon layer, a vertical channel structure, and a charge storage structure. The stack structure is disposed on the substrate. The stack structure includes a plurality of dielectric layers and a plurality of conductive layers stacked alternately. The polysilicon layer is disposed between the substrate and the stack structure. The vertical channel structure penetrates through the stack structure and the polysilicon layer. The charge storage structure is at least disposed between the vertical channel structure and the plurality of conductive layers.