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US Patent 12093618 Automated circuit generation

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Patent attributes

Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

Patent Inventor Names

John Mason0

Karen Mason0

Calum MacRae0

Date of Patent

September 17, 2024

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Patent Application Number

183140070

Date Filed

May 8, 2023

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Patent Citations

US Patent 8001494 Table-based DFM for accurate post-layout analysis

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US Patent 10699051 Method and system for performing cross-validation for model-based layout recommendations

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US Patent 10770160 Programmable resistive memory formed by bit slices from a standard cell library

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US Patent 10783292 Automated analog layout

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US Patent 10783296 Matched net and device analysis based on parasitics

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US Patent 10796059 Integrated circuit layout generation method and system

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US Patent 10808333 Method and apparatus for performing layout designs using stem cells

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US Patent 10846456 Integrated circuit modeling methods and systems

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Patent Primary Examiner

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CPC Code

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Patent abstract

In some embodiments, a computer-implemented method of generating a resistor comprises receiving a first resistor value, converting the resistor value into a plurality of resistor layout segments, and automatically placing the plurality of resistor layout segments based on one or more layout placement instructions to form the first resistor value.

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