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Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Yen-Yu Chen0
Chung-Liang Cheng0
Date of Patent
September 17, 2024
0Patent Application Number
178159990
Date Filed
July 29, 2022
0Patent Citations
Patent Primary Examiner
Patent abstract
The present disclosure is directed to gate-all-around (GAA) transistor structures with a low level of leakage current and low power consumption. For example, the GAA transistor includes a semiconductor layer with a first source/drain (S/D) epitaxial structure and a second S/D epitaxial structure disposed thereon, where the first and second S/D epitaxial structures are spaced apart by semiconductor nano-sheet layers. The semiconductor structure further includes isolation structures interposed between the semiconductor layer and each of the first and second S/D epitaxial structures. The GAA transistor further includes a gate stack surrounding the semiconductor nano-sheet layers.
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