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US Patent 7042245 Low power consumption MIS semiconductor device
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Patent
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Date Filed
April 9, 2003
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Date of Patent
May 9, 2006
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Patent Application Number
10409585
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Patent Citations Received
US Patent 11870431 AC coupling modules for bias ladders
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US Patent 12081211 High power positive logic switch
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US Patent 12074217 Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
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Patent Inventor Names
Hideto Hidaka
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
7042245
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Patent Primary Examiner
Patrick Wamsley
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