Patent attributes
A microelectronic substrate including at least one microelectronic device disposed within an opening in a microelectronic substrate core, wherein an encapsulation material is disposed within portions of the opening not occupied by the microelectronic devices, or a plurality microelectronic devices encapsulated without the microelectronic substrate core. At least one conductive via extended through the substrate, which allows electrical communication between opposing sides of the substrate. Interconnection layers of dielectric materials and conductive traces are then fabricated on the microelectronic device, the encapsulation material, and the microelectronic substrate core (if present) to form the microelectronic substrate.