US Patent 7120661 Bit exactness support in dual-MAC architecture
Patent 7120661 was granted and assigned to Freescale Semiconductor on October, 2006 by the United States Patent and Trademark Office.
All edits
Edits on 31 Aug, 2023
Golden AI
Edits made to:
Article (+266 characters)
Article
Patent abstract
An arrangement (200) and method for bit exactness support in dual-MAC architecture by detecting when underflow or overflow conditions will occur, and for operating the dual-MAC arrangement in single-MAC mode for at least one cycle upon such detection.
Edits on 14 Jul, 2023
Golden AI
Edits made to:
Infobox (+1/-1 properties)
US Patent 07120661 Bit exactness support in dual-MAC architecture US Patent 7120661 Bit exactness support in dual-MAC architecture
Infobox
Patent Number
0712066100
Patent Number
712066100
Edits on 25 May, 2023
Golden AI
Edits made to:
Infobox (-1 properties)
Infobox
Official Website
Edits on 24 Mar, 2023
Golden AI
Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
071206610
Date of Patent
October 10, 2006
0Patent Application Number
104473520
Date Filed
May 29, 2003
0Official Website
Patent Primary Examiner
Edits on 23 Sep, 2022
Golden AI
Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
071206610
Date of Patent
October 10, 2006
0Patent Application Number
104473520
Date Filed
May 29, 2003
0Official Website
Patent Primary Examiner
Edits on 7 Jun, 2022
Golden AI
Edits made to:
Infobox (+1 properties)
Infobox
Website URL
Edits on 18 Nov, 2021
Golden AI
Edits made to:
Infobox (+8 properties)
US Patent 07120661 Bit exactness support in dual-MAC architecture
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07120661
Date of patent
October 10, 2006
Patent application number
10447352
Date Filed
May 29, 2003
Patent primary examiner
Find more entities like US Patent 7120661 Bit exactness support in dual-MAC architecture
Use the Golden Query Tool to find similar entities by any field in the Knowledge Graph, including industry, location, and more.
