US Patent 7149998 Lithography process modeling of asymmetric patterns

A lithography process model is generated to account for asymmetric printing of a feature of a target pattern to help better predict how the target pattern will print. The process model for one embodiment may be generated based on data generated from measurements of spacings between symmetrically defined features of printed test patterns to help predict edge offsets of the feature relative to the target pattern when printed and/or to help predict a dimension of the feature when printed. The process model may be used to help design, manufacture, and/or inspect a mask to help print the target pattern more accurately and therefore help manufacture an integrated circuit (IC), for example, that more accurately matches its intended layout.