Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
January 30, 2007
Patent Application Number
10519201
Date Filed
May 14, 2003
Patent Primary Examiner
Patent abstract
A method for fabricating a spacer structure includes: forming a gate insulation layer having a gate deposition-inhibiting layer, a gate layer and a covering deposition-inhibiting layer on a semiconductor substrate, and patterning the gate layer and the covering deposition-inhibiting layer in order to form gate stacks. An insulation layer is deposited selectively using the deposition-inhibiting layers, thereby permitting highly accurate formation of the spacer structure.
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