US Patent 7169677 Method for producing a spacer structure
Patent 7169677 was granted and assigned to Infineon Technologies on January, 2007 by the United States Patent and Trademark Office.
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Patent abstract
A method for fabricating a spacer structure includes: forming a gate insulation layer having a gate deposition-inhibiting layer, a gate layer and a covering deposition-inhibiting layer on a semiconductor substrate, and patterning the gate layer and the covering deposition-inhibiting layer in order to form gate stacks. An insulation layer is deposited selectively using the deposition-inhibiting layers, thereby permitting highly accurate formation of the spacer structure.
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US Patent 07169677 Method for producing a spacer structure US Patent 7169677 Method for producing a spacer structure
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Patent Number
0716967700
Patent Number
716967700
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Official Website
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
071696770
Date of Patent
January 30, 2007
0Patent Application Number
105192010
Date Filed
May 14, 2003
0Official Website
Patent Primary Examiner
Edits on 24 Sep, 2022
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
071696770
Date of Patent
January 30, 2007
0Patent Application Number
105192010
Date Filed
May 14, 2003
0Official Website
Patent Primary Examiner
Edits on 8 Jun, 2022
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US Patent 07169677 Method for producing a spacer structure
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07169677
Date of patent
January 30, 2007
Patent application number
10519201
Date Filed
May 14, 2003
Patent primary examiner
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