Patent attributes
A signal detector capable of linearly reading data at a high speed is obtained. This signal detector comprises a plurality of signal transfer transistors arranged in the form of a matrix, signal detection means connected to a first terminal of each signal transfer transistor, a data line connected to a second terminal of each signal transfer transistor, a control line connected to the gate of each signal transfer transistor, a gate line driving circuit for driving the control line, data read lines connected to a plurality of prescribed data lines through switching transistors respectively, and a switch driving circuit for driving the switching transistors corresponding to the aforementioned plurality of prescribed data lines substantially at the same timing. Thus, a plurality of prescribed data are simultaneously read for enabling linear data reading and increasing the speed of data reading.
