Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Harold Pilo0
John A. Fifield0
Wagdi W. Abadeer0
Date of Patent
August 28, 2007
0Patent Application Number
109060560
Date Filed
February 1, 2005
0Patent Primary Examiner
Patent abstract
An SRAM cell with gate tunneling load devices. The SRAM cell uses PFET wordline transistors and NFET cross-coupled transistors. The PFET wordline transistors are fully conductive during read operations, thus a full voltage level is passed through the PFET to the high node of the cell from the bitline. Tunnel current load devices maintain the high node of the cell at full voltage level during standby state.
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