Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
March 25, 2008
Patent Application Number
10773665
Date Filed
February 6, 2004
Patent Primary Examiner
Patent abstract
Methods for determining tolerances are disclosed that can be used for determining whether a lot of semiconductor wafers needs to be reworked. Overlay tolerance, critical dimension tolerance and a dynamic line edge placement tolerance are determined using error measurements that are taken from sample wafers in the lot, giving tolerances that reflect the error state of that particular lot of semiconductor wafers.
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